Threads
In our RAM buying guide, we mentioned that the two most important specifications to look at are frequency and CAS latency. These are usually enough for casual gamers who just want a good memory kit to go with their CPU. But if you’re into memory tuning, there’s a lot more you should know—especially when it comes to RAM timings. In this guide, I’ll explain those timings so everything makes more sense.
RAM timings are split into three types in the BIOS: Primary, Secondary, and Tertiary. Each of these can affect performance in different ways. But keep in mind, that tweaking RAM timings doesn’t always lead to better results. Sometimes, you might push the settings too far and lose system stability without seeing much improvement.
So, let’s break down each type of RAM timing and see how they can impact your overclocking performance.
Primary Timings (High-Performance Impact)
These timings are normally advertised everywhere on the marketing websites and even on the back of the packaging. Primary timings are crucial and can directly influence the response time and performance in games and software.
CAS Latency (tCL)
The most important one, CL, measures how quickly the RAM can respond to a request for data from the CPU. It’s usually expressed as the number CL30-CL32, CL36, and so on. The lower the CAS Latency, the better the overall performance—usually, the CL scales are done with the DRAM voltages. The CAS latency, combined with the frequency, is also used to calculate the latency of a kit in nanoseconds, we’ve developed a RAM Latency Calculator for DDR5 kits, which you can use to calculate the latency of your RAM.
RAS to CAS delay (tRCD)
RAS (Row Access Strobe) to CAS (Column Access Strobe) Delay: This is the second most important timing. When the CPU requests data from the RAM, the memory needs to access the row (RAS) and then jump to the column (CAS). The lower the tRCD value is, the faster row-to-column switching is. It can also greatly influence the FPS in games. It also scales with the voltage, but it is much harder than tCL to find the sweet spot.
Row Precharge Time (tRP)
Row Pre Charge. As we have discussed the columns and rows in the tCL and tRCD, TRP controls how fast the memory can switch between the active rows.
RAS Active Time (tRAS)
It simply tells us how long a row must stay open before it can be closed. It’s the fourth most important timing, but it is less impactful on FPS; usually, tRAPS numbers are calculated (tRCD + tRP). It is important to tune the tRCD and tRP to find the sweet spot for the tRAS.
Secondary Timings (Moderate Performance Impact)
The secondary timings are also advertised on the marketing pages alongside the primary timings; they’re called secondary timings because, as the name suggests, they’re the second most important timings and not as impactful as the primary timings.
Write Recovery Time (tWR)
It usually favors the productivity workload. When the data is written to the row, the memory takes some time to finalize the operation before it closes and then jumps to the next row.
Refresh Cycle Time (tRFC)
tRFC is a very important timing in the secondary timings and is always tuned when we’re tuning the memory. It controls how often RAM refreshes the data. It is also very dependent on the DRAM temperatures overall. Lower tRFC values are beneficial and can scale well with VSOC voltage on the AMD platform. tRFC is calculated using this formula tRFC (cycles) ÷ (MHz ÷ 2) × 1000 = ns
RAS to RAS Delay Long (tRDD_L) & RAS to RAS Delay Short (tRDD_S)
These timings are very close to each other. They also do the same thing but with different purposes. tRDD_L and tRDD_s control how fast your memory can switch between accessing rows in the same bank. This timing is often overlooked by the overclockers.
Read to Precharge (tRTP)
tRTP determines how quickly the memory can close an active row. This timing works in conjunction with the tRCD (Row-to-column) delay. In many cases, tRTP is half of tRCD. The lower tRTP values can cycle through rows more quickly. This timing is also linked with the tWR (Write Recovery Time). The rule of thumb is to keep the two 2x as tRTP.
Four Active Window (tFAW)
It is one of the important secondary timings. tFAW controls how many row activations can occur within a specific period. However, only a maximum of four activate commands can be done due to certain limitations. For example, if the tFAW is set to 40, the latency of four active windows would be 24ns, and if the tFAW is 16, the activation cycle would be 10ns. tFAW often works best when coupled with tRRD; the tFAW should be 4x of the tRRD; if the tRRD is 16, the tFAW must be 4.
CAS Write Latency (tCWL)
CAS write latency is very similar to tCL (CAS Latency). CL is the delay in how quickly the CPU can read the data, and CWL (CAS Write Latency) is how quickly it can write the information from the CPU.
Tertiary Timings: (Almost No Impact, But Stability)
Tertiary timings are not commonly advertised in marketing packages or even in the packaging of your memory kits. However, Tertiary timings could be dynamic and greatly vary on the motherboard or CPU IMC; when you install the memory in your PC, the boards automatically adjust the tertiary timings during the memory training. The tertiary timings don’t affect the performance, but they can ensure your platform’s stability when overclocking your memory.
Refresh Interval (tREFI)
tREFI is one of the critical timing, and it also interacts with the tRFC (Refresh Cycle Time); tREFI is the average interval between the refresh commands; once the refresh command is issued, there is a delay before the following command is issued. tREFI s can significantly improve the performance in games and reduce latency reduction. However, It is also very temperature-dependent on the memory.
Clock Enable Time (tCKE)
tCKE is often overlooked by the tuners; the basic definition of tCKE is how quickly it can transition from the memory sleep state to the active memory operations. It determines how many clock cycles are required, from sleep mode to wake-up time. However, it is also one of the power-saving timings for the ram-modules; if you set the tCKE to 1, it will turn off the power states of your memory, and tCKE to 0 is automatic.
Read to Read Delay (tRDRD)
It’s a delay between how quickly your RAM can switch between read operations. It can be optimized with tFAW and tRRDL to enhance the random read operations.
Read to Write Delay (tRDWR)
It’s a delay between how quickly your RAM can switch between reading to writing operations.
Write to Read Delay (tWRRD)
It’s a delay between how quickly your RAM can switch between writing to read operations.
Write to Write Delay (tWRWR)
tWRWR governs how quickly your RAM can perform consecutive write operations.
Final Thoughts
Just remember: not every timing tweak will result in better performance. In fact, going too aggressive can lead to crashes, instability, or zero real-world gains. Always test your system thoroughly after any change, and don’t forget that stability matters more than a few extra benchmark points.
If you’re new to memory tuning, start with the primary timings and work your way down. And if you ever feel overwhelmed—it’s okay. For most users, sticking with XMP/EXPO profiles gives more than enough performance.
Thank you! Please share your positive feedback. 🔋
How could we improve this post? Please Help us. 😔
I’m Usman Sheikh, a Senior Hardware Reviewer at Tech4Gamers with over a decade of experience in the tech industry. My journey began in 2014 as a senior administrator for Pakistan’s largest gaming community forum. Passionate about PCs and hardware, I specialize in testing and reviewing components like graphics cards, CPU coolers, and motherboards, while also sharing insights on overclocking and system optimization.
Join Our Community
