Today we have some new details about the AMD Zen architecture, which is designed to significantly increase performance per core, especially the performance of numerical data (integer / floating). AMD Zen architecture will almost double the number of decoders, ALU and floating point units per core compared to its predecessor. In essence, each core of Zen in terms of power equivalent to two Steamroller architecture, so we can say that the performance is huge.
AMD Zen will double the performance per core compared to Steamroller
AMD Bulldozer architecture which debuted with the company’s first FX processors for socket AM3 +, followed by Excavator and continuing with the Carrizo APU, AMD’s approach to CPU cores involved modules, which packed two physical cores with a combination of dedicated and shared resources between them.
Finally the focus of AMD was unintelligent and began arriving problems with applications, where sequencing software loaded on a multi-processor module had repercussions in a less optimal scenario if it were to load a kernel module instead of loading additional cores. AMD’s workaround tricked software (particularly OS schedulers) into thinking that a “module” was a “core” which had two “threads” so we can say that an eight-core FX-8350 would be seen by software as a 4-core processor with 8 threads.
AMD Zen will eliminate the barriers between two cores within a module. Now we have a large monolithic core with 4 decoders, 4 ALU (Bulldozer had two per core) and four units of 128 bit wide floating point supported by two 256-bit FMACs. This achieves nearly double the processing muscle numeric data per core. AMD also chose to implement a technology similar to SMT (Simultaneous Multithreading), which has a function similar to HyperThreading, running multiple threads per core.